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Reduction of Kickback Noise in Latched Comparators for Cardiac IMDs
Background/Objectives: The latched regenerative comparator is an essential block in all ADC architectures. It majorly suffers from the non-idealities such as kickback noise, thermal noise and offset voltage. Especially in an ADC implemented in Cardiac IMDs, the generated kickback noise in latched comparator can make a difference to the accuracy, resolution and settling time to an extent. The main objective of this work is to implement a technique for kickback noise reduction in latched comparators. Methods/Statistical Analysis: This work reviews the various architectures of latched comparators implemented in Cardiac IMDs and also make assessment of the available solutions to reduce the generated kickback noise in a latched comparator. The available kickback noise reduction techniques are implemented in SR latched dynamic comparators and resultant findings are compared. Findings: This brief proposes a new solution to cancel out the unwanted charge injections in the comparator and thus reduces the kickback noise effectively. The proposed solution is implemented in the latched comparator with SR latch and also compared with the already available solutions with regard to kickback noise and power dissipation. Application/Improvements: The proposed Kickback noise reduction technique reduces the noise to 40% more when compared with the other techniques and this technique is applicable to the dynamic Comparators used in Cardiac IMDs.
Carddiac IMDs, Cmos Technology, Kickback Noise, Latched Comparator, Offset Voltage, Random Noise.
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