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Register Embedded Self Immunity using Reversible Logic Gates


  • Department of Electronics and Communication Engineering, GMR Institute of Technology, Rajam – 532127,Andhra Pradesh, India


Now days due to Continuous shrinkage in number of transistors on chip, soft errors also increases. Soft errors are very annoying because they are an energetic particle which propagates in entire system causing transient faults. This in turn reduces the Reliability of register files. In this paper Self-Immunity Technique is introduced, which improves register file Reliability with respect to soft errors. In this paper difficulty to enhance the register file integrity against soft errors based on the observation. In this paper, Reversible Logic Gates (RLG) is used instead of Logic Gates to design the circuit and Error Correcting Code (ECC) is incorporated within the circuit to avoid soft errors. Our Experiments demonstrate that our proposed technique reduced Power consumption by 30.51%, Delay in time reduced by 12.6% and Temperature decreased by 0.1%.


ECC- Error Correcting Code, RESI- Register Embedded Self Immunity, RLG- Reversible Logic Gates.

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