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Efficient CPU Core Usage and Balanced Bandwidth Distribution using Smart Adaptive Arbitration

Affiliations

  • School of Electrical and Electronics Engineering, Universiti Sains Malaysia, 14300 Nibong Tebal, Penang, Malaysia

Abstract


Software industry has been revolutionized due to the introduction of multi-core chips and high performance computing. The current trend shows that number of cores per chip will double every alternate year without any modification in the processor clock speed. Sophisticated parallel computation needs to resolve the access of bus in an optimum manner by keeping in mind the parameter of efficiency. In any multi-core system, an arbiter is the one which receives numerous bus access requests which various processors (masters) generates. This article proposes a new strategy of arbitration known as Smart Adaptive Arbitration (SAA) to enhance the CPU cores usage to enable parallel computing along with balanced bus bandwidth distribution. The designed SAA is for heterogeneous masters which compute with respect to different behavior of data traffic to attain task parallelism. Latest benchmark program has been used to evaluate the performance of SAA. The results shows that SAA stands better if compared with other arbitration techniques as it tries to enable high degree of task parallelism and a balanced bandwidth distribution to the masters requesting bus access. SAA has a potential to be a promising arbitration strategy for solving future on-chip resource necessities.

Keywords

Arbiter, Bandwidth Distribution, CPU Utilization, Multi-Core, Smart Adaptive Arbiter, Task Parallelism.

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