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Performance Analysis of Reversible ALU in QCA


  • Department of ECE, ASET, Amity University, Lucknow – 226028, Uttar Pradesh, India
  • Department of ECE, The Oxford College of Engineering, Bengaluru – 560068, Karnataka, India


Quantum spot Cell Automata (QCA) based reversible method of reasoning is the foundations of creating nanotechnological figuring structures. It ensures enormously low power usage with high thickness and working repeat. Programmable reversible method of reasoning is ascending as an approaching basis arrangement style for execution in present day nanotechnology and quantum preparing with unimportant impact on circuit warm period. Late advances in reversible method of reasoning using and quantum PC figuring mull over improved PC building and math basis unit designs. This work focuses on plan of a powerful reversible ALU (Arithmetic Logic Unit) and its affirmation in QCA. We have considered existing 3 × 3 M-R Gate as the essential building block, a 4*4 reversible method of reasoning entryways (M-R Gate with immaterial delay and orchestrated to convey a grouping of genuine relies on settled yield lines in perspective of programmable select data lines. We similarly display QCA utilization of M-R passage with slightest cell check. The proposed ALU requires only 6 entry ways, which is more locale capable than the present work. It is repeated using QCA Designer.


Arithmetic and Logical Unit U, Marrision-Ranganathan, Quantum Dot Cellular Automata, Reversible Logic.

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  • Orlov A,Amlani GI. Realization of a functional cell forquantumdot cellular automata. Science. 1997; 277(5328):928–30. Crossref
  • Wong H-SP, Wann CH, Welser JJ. Nanoscale cmos. Proceedings of the IEEE. 1999; 87(4):537–70. Crossref 3. Farazkish R, Haghparast M. New method for decreasing the number of quantum dot cells in QCA circuits. World Applied Sciences Journal. 2008; 6:793–802.
  • Mukhopadhyay D,Dutta P. Designing and implementation of quantum cellular automata 2: 1 multiplexer circuit. International Journal of Computer Applications. 2011; 25(21). Crossref
  • Oya T. A majority-logic device using an irreversible singleelectron box.IEEE Transactions on Nanotechnology. 2003; 2(1):15–22. Crossref
  • Amarel S, Winder R. Majority gate networks.IEEE Transactions on Electronic Computers. 1964; 1:4–13.
  • Design and implementation of 16-bit arithmetic logic unit using quantum dot cellular automata technique.International Journal of Engineering Research and Applications. 2014; 4(9):10–16.


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