Total views : 418

Energy Efficient Memory Design using Low Voltage Complementary Metal Oxide Semiconductor on 28nm FPGA

Affiliations

  • Department of Computer Science, Maharaja Surajmal Institute, Janakpuri, Delhi-110058, India
  • Department of ECE, Chitkara University, Punjab - 140 401, India
  • Department of IT, IIIT Gwalior, Gwalior, India

Abstract


In this work, we are designing a energy efficient memory circuit on 28nm FPGA. Four different LVCMOS are used to validate the energy efficient design. There is 40.67% power reduction when LVCMOS25 is used in place of LVCMOS33. LVCMOS25 is better than LVCMOS33 IO Standard according to our experiment. With LVCMOS15 there is 75.70% total power reduction in compare with the LVCMOS33. LVCMOS15 is most energy efficient IO Standard and LVCMOS33 is most power consuming IO Standard. To design a power efficient memory we are using Verilog as HDL, Xilinx ISE 14.6 simulator with kintex-7 FPGA.

Keywords

Energy Efficient, FPGA, IO Standard, Low Power, LVCMOS, Memory

Full Text:

 |  (PDF views: 273)

References


  • Rezgui S, Swift GM, Lesea A. Characterization of Upset-induced Degradation of Error-Mitigated High-Speed I/O’s using Fault Injection on SRAM based FPGAs. IEEE Transactions on Nuclear Science. 2006 Aug; 53(4):2076–83.
  • Han X, Chen SL, Wu L, Yan Z, Li Y. Design and verification of Distributed RAM using Look-Up Tables in an SOI-based FPGA. 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT); 2012;p. 306–8.
  • Wang Y, Zhang P, Cheng X, Cong J. An Integrated and Automated Memory Optimization Flow for FPGA Behavioral Synthesis. 2012, 17th Asia and South Pacific Design Automation Conference (ASP-DAC); 2012; IEEE; p. 257–62.
  • Pandey B, Yadav J, Singh Y, Kumar R, Patel S. Energy Efficient Design and Implementation of ALU on 40-nm FPGA. IEEE International Conference on Energy Efficient Technologies for Sustainability-(ICEETs); 2013 Apr 10-12; Nagercoil, Tamilnadu. p. 45–50.
  • Pandey B, Kumar R. Low Voltage DCI based Low Power VLSI Circuit Implementation on FPGA. IEEE Conference on Information and Communication Technologies (ICT 2013); 2013 Apr 11-12; p. 128–31.

Refbacks

  • There are currently no refbacks.


Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 License.