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A Study on Advanced High Speed and Ultra Low Power ADC Architectures

Affiliations

  • Department of Biomedical Engineering, Guru Jambheshwar University of Science and Technology (GJUS&T), Delhi Road, Hisar – 125001, Haryana, India
  • Department of Electronics and Communication Engineering, Guru Jambheshwar University of Science and Technology (GJUS&T), Delhi Road, Hisar – 125001, Haryana, India
  • University School of Information, Communication and Technology (USICT), Guru Gobind Singh Indraprastha University, Dwarka – 110078, New Delhi, India

Abstract


Background: Analog-to-digital converter (acronym as ADC) is an electronics device used to convert a continuous physical signal to a digital number. Over recent years, different advancement has been done and both the beginner as well as expert can be bewildered to differentiate their limitations and benefits. Objective: To overcome this problem this paper provides a brief study about these advance architectures and their parameters. The deliberation of these parameters can make a suitable decision to adopt a better architecture for the purpose of research. Methods: reviewed in this paper include parametric and non parametric ultra low, high speed, low noise architectures.

Keywords

ADC Architectures, SAR DAC, TI ADC, PWM ADC.

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References


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