Total views : 298

Optimized Hardware Crypto Engines for XTEA and SHA-512 for Wireless Sensor Nodes


  • Department of Electrical and Computer Engineering, Sultan Qaboos University, Muscat, Oman


Objectives: This study proposes an optimized power-efficient cryptosystem that is suitable for Wireless Sensor Networks. Methods: A number of cryptographic algorithms have been proposed to secure Wireless Sensor Networks. However, these compute-intensive and power-hungry algorithms do not take into consideration the limitations of resource found on the sensor nodes. We propose profiling some of these popular algorithms to identify the speed bottlenecks and develop hardware accelerators that maintain the real-time performance, with an efficient use of power. Findings: The proposed optimizations to the hardware accelerators were mapped to reconfigurable computing devices. Results show that the performance of the proposed hardware outperforms the software implementation running on contemporary CPU by up to 21.9×. In addition, the results indicate that the hardware is efficiently managing its power budget. Application: These accelerators can be utilized in heterogeneous system architectures, where the CPU controls the overall operations, and the accelerators efficiently perform the necessary encryption and decryption.


Cryptography, FPGA, Power Efficiency, Reconfigurable Computing, WSN.

Full Text:

 |  (PDF views: 258)


  • Hodjat A, Verbauwhede I. A 21.54 Gbits/s fully pipelined AES processor on FPGA. Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. 1025852: IEEE Computer Society. 2004; 308–9.
  • Huang C-W, Chang C-J, Lin M-Y, Tai H-Y. The FPGA implementation of 128-bits AES algorithm based on four 32-bits Parallel operation. Proceedings of the: The First International Symposium on Data, Privacy, and E-Commerce. 1338092: IEEE Computer Society. 2007; 462–4.
  • Yee Wei L, Havinga PJM. How to secure a wireless sensor network? Proceedings of Second International Conference on Intelligent Sensors, Sensor Networks and Information Processing (ISSNIP), Melbourne, Australia, IEEE. 2005. p. 89–95. ISBN 0-7803-9399-6.
  • Nadeem A, Javed MY. A Performance comparison of data encryption algorithms. Proceedings of First International Conference on Information and Communication Technologies (ICICT 2005). 2005. p. 84–9.
  • Avancha S, Undercoffer J, Joshi A, Pinkston J. Security for wireless sensor networks. Wireless sensor networks: Kluwer Academic Publishers. 2004; 253–75.
  • Stelte B. Toward development of high secure sensor network nodes using an FPGA-based architecture. Proceedings of the 6th International Conference on Wireless Communications and Mobile Computing, Caen, France. 1815521: ACM. 2010. p. 539–43.
  • Pathuri L, Al Maashri A, Ahmad A, Khaoua MO, Awadalla M. Securing wireless sensor networks using customized hardware crypto engine. Proceedings of National Symposium on Innovations in Information Technology (NSIIT’15). 2015; 54–7.
  • Limited A. mbed TLS Source Code: Fully open-source. 2015. Available from:
  • Ahmad A, Al Busaidi SS, Al Maashri A, Awadalla M, Rizvi MAK, Mohanan N. Computing and Listing of Number of Possible m-Sequence Generators of Order n. Indian Journal of Science and Technology. 2013; 6(10):5359–69.
  • Ahmad A, Samarth A, Al Maashri A, Al Busaidi SS, Al Shidhani A. On determination of LFSR structures to assure more reliable and secure designs of cryptographic systems. Reliability, Infocom Technologies and Optimization (Trends and Future Directions), ICRITO 2014, At Amity University, Noida, India, IEEE. 2015; 1:163–7. ISBN: 978-93-83083-99-2. Doi: 10.1109/ICRITO.2014.7014681, 1-5.
  • Ahmad A, Al Busaidi SS, Al Lawati A, Tarhuni N. On energy efficient cryptographic keys. Proceedings of National Symposium on Innovations in Information Technology (NSIIT’15). 2015; 92–4.
  • Thasneem PT, Salim PT, Vigneswaran T. FPGA implementation of hiding information using cryptography. Indian Journal of Science and Technology. 2015; 8(19):110–6.
  • Barari A. Digital hardware IP cores XFA. 2015. Available from:
  • Krukowski L, Sugier J. Organization of AES Cryptographic Unit for Low Cost FPGA Implementation. Proceedings of Third International Conference on Dependability of Computer Systems, DepCos-RELCOMEX '08, IEEE 10.1109/DepCoS-RELCOMEX. 2008; 36:347–54.
  • Kretzschmar U, Astarloa A, Jesus L Z, Bidarte U, Jimenez J. Robustness analysis of different AES implementations on SRAM based FPGAs. Proceedings of Third International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011), IEEE. 10.1109/ReConFig. 2011; 80:255–60.
  • Mentorgraphics/Altera. Model Sim-Altera Software. 2015. Available from:
  • Altera. Quartus Prime Software. 2015. Available from:
  • Teras IC. Altera DE0 Boa. 2015. Available from:
  • Maashri AA, DeBole M, Cotter M, Chandramoorthy N, Xiao Y, Narayanan V, Chakrabarti C. Accelerating neuromorphic vision algorithms for recognition. Proceedings of Third International Conference on Design Automation Conference (DAC 2012), ACM/EDAC/IEEE. 2012. p. 579–84.
  • Kaps J-P. Chai-Tea. Cryptographic hardware implementations of xTEA. Proceedings of the 9th International Conference on Cryptology in India: Progress in Cryptology; Kharagpur, India. 1484939: Springer-Verlag. 2008. p. 363–75.
  • Fan X, Gong G, Lauffenburger K, Hicks T. FPGA implementations of the Hummingbird cryptographic algorithm. Proceedings of the 9th International Conference on Hardware-Oriented Security and Trust (HOST 2010). 2010. p. 48–51.
  • Garcia R, Algredo-Badillo I, Morales-Sandoval M, Feregrino-Uribe C, Cumplido R. A compact FPGA-based processor for the Secure Hash Algorithm SHA-256. Computers and Electrical Engineering, 2014; 40(1):194–202.
  • Algredo-Badillo I, Morales-Sandoval M, Feregrino-Uribe C, Cumplido R. Throughput and efficiency analysis of unrolled hardware architectures for the SHA-512 Hash algorithm. (ISVLSI), 2012 IEEE Computer Society Annual Symposium on VLSI, IEEE, 10.1109/ISVLSI. 2012; 63:63–8.


  • There are currently no refbacks.

Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 License.