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TG based 2T2M RRAM using Memristor as Memory Element

Affiliations

  • Department of Electronics and Communication Engineering, Birla Institute of Technology (Deemed University), Mesra, Ranchi - 835215, Jharkhand, India

Abstract


Objective: This article presents a transmission gate based novel 2T2M RRAM using memristor as memory element. Method/Analysis: Simulation results of critical design metrics of proposed 2T2M RRAM cell and conventional SRAM cell are compared. Findings: The proposed 2T2M RRAM cell achieves 1.35 × lower read delays at the expense of 1.02 ×higher write delay than conventional 6T SRAM cell at nominal Vdd. Moreover, being non-volatile it is more power efficient and also saves at least 50% of area. Novelty/Improvement: It is more power efficient and saves 50% of area. Further, being differential in nature, proposed cell is more immune to PVT variation during read operation.

Keywords

Memristor, Nonvolatile, RRAM, Read Delay, Transmission Gate, Write Delay

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