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Threshold Voltage Extraction of 220nm FDSOI Device using Linear Extrapolation Method
Objectives: The objective of this research article is to extract threshold voltage of fully depleted silicon on insulator (FDSOI) device@ gate length of 220 nm. Methods/Analysis: This paper aims at modeling of fully depleted silicon on insulator (FDSOI) device @ gate length of 220nm. This work finds threshold voltage of FDSOI device using linear extrapolation method. Findings: Threshold voltage of the device is found to be 0.21 V. For different gate voltages, drain current versus drain voltage characteristics curves are plotted in this paper. Novelty /Improvement: The modeled device is applicable in designing ultra-low power circuits which are useful in portable and wearable devices.
Drain Current, Drain Voltage, FDSOI Device, Gate Voltage, Linear Extrapolation, Threshold Voltage.
- Shrivastava A, Tripathi N, Agarwal E, Singh A. Comparative study of double gate SOI MOSFET and single gate SOI MOSFET through simulation. International Journal of Electronics and Electrical Engineering. 2015 Jun; 7(1).
- Prabhakaran G, Kannan V. Design and analysis of high gain, low power and low voltage a-Si TFT based operational amplifier. Indian Journal of Science and Technology. 2015 Jul; 8(16). DOI: 10.17485/ijst/2015/v8i16/59228.
- Adan AO, Higashi K. OFF-state leakage current mechanisms in BulkSi and SOI MOSFETs and their impact on CMOS ULSIs standby current. IEEE Transactions on Electron Devices. 2001 Sep; 48(9).
- Ernst T, Muteanu D, Cristoloveanu S, Ouisse T, Hefyene N, Horiguchi S, Ono Y, Takahashi Y, Murase K. Ultimately thin SOI MOSFETs: Special characteristics and mechanisms. SOC Conference, IEEE International; 1999. p. 92–3.
- Chiang TK. A novel threshold voltage model for fully-depleted, multiple-gate MOSFETs: With effective number of gates included. IEEE Transactions on Nanotechnology. 2013; 12(6):1022–25.
- Colinge J-P, Park J-W, Xiong W. Threshold voltage and subthreshold slope for multiple-gate SOI MOSFETs. IEEE Electron Device Letters. 2003 Aug; 24(8):515–17.
- Ortiz-Conde A, Sanchez FJG, Liou JJ, Cerdeira A, Estrada M, Yue Y. A review of recent MOSFET threshold voltage extraction methods. Microelectronics Reliability. 2002; 42:583–96.
- GarcõÂaSaÂncheza FG, Ortiz-Condea A, De Mercatoa G, Salcedoa JA, Lioub JJ, Yuec Y. New simple procedure to determine the threshold voltage of MOSFETs. Solid-State Electronics. 2000; 44:673–5.
- Terada K, Nishiyama K, Hatanaka KI. Comparison of MOSFET threshold voltage extraction methods. Solid State Electronics. 2001 Jan; 45(1):35–40.
- Dobrescu L, Petrov M, Dobrescu D, Ravariu C. Threshold voltage extraction methods for MOS transistors. Semiconductor CAS 2000 Proceedings International. 2000; 1.
- Loke ALS, Wu Z-Y, Moallemi R, DruCabler C, Lackey CO, Tin Wee T, Doyle BA. Constant-current threshold voltage extraction in HSPICE for nanoscale CMOS analog design. Synopsys Users Group (SNUG) Conference San Jose, At Santa Clara, CA; 2010.
- Makovejev S, KazemiEsfeh B, Raskin J-P, Flandre D, Kilchytska V, Andrieu F. Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB MOSFETs. Solid-State Device Research Conference (ESSDERC), 2013 Proceedings of the European; 2013.
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