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Design of Reversible Number Generator using Finite State Automation Realization
Objective: The objective of this paper is to realize an n-bit reversible number generator. Several designs of number generator and their corresponding constraints with feedback controller and initial state have also been discussed. Method/Analysis: The proposed design is validated by simulating the results in Verilog HDL. Findings: In this paper a design is presented to implement an n bit number generator as a finite state automation, using reversible logic for the implementation of the transition network. A realizable circuit is designed to implement the n-bit number generator using feedback controllers. Novelty/Improvement: With the use of reversible logic, the designed circuit reaches all the possible states and consumes no power.
Finite State Automation, Number Generator, Reversible Computing, Reversible Logic Synthesis.
- Schrom, G. Ultra-Low Power CMOS Technology. PhD thesis. Technische Universitaet Wien; 1998.
- Knill E, Laflamme R, and Milburn GJ. A scheme for efficient quantum computation with linear optics. Nature. 2001. p. 46–52.
- Nielsen MI, Chuang. Quantum Computation and Quantum Information. Cambridge Univ. Press; 2000.
- Merkle RC. Two types of mechanical reversible logic. Nanotechnology. 1993; 4(2): 114–131.
- Rice JE. A new look at reversible memory elements. Proceedings of 2006 IEEE International Symposium on Circuits and Systems; ISCAS. 2006. p. 243–6.
- Nandal A, Vigneswaran T, RanaAshwani K. Booth multiplier using reversible logic with low power and reduced logical complexity. Indian Journal of Science and Technology. 2014; 7(4): 525–9.
- Bhagyalakshmi HR, Venkatesha MK. Design of sequential circuit elements using reversible logic. World Applied Programming. 2012; 2: 263–271.
- Mamun MSA, Mandal I and Hasanuzzaman M. Efficient design of reversible sequential circuit. IOSR Journal of Computer Engineering. 2015; 5(6): 42–7.
- Sayem ASM, Ueda M. Optimization of reversible sequential circuits. Journal of Computing. 2012; 2(6): 208–14.
- Miller DM, Maslov D, Dueck GW. A transformation based algorithm for reversible logic synthesis. Proceedings of Design Automation Conference; 2003. p. 318–323.
- Gupta P, Agrawal A, Jha NK. An algorithm for synthesis of reversible logic circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2006; 25(11): 2317–30.
- Morrison M, Ranganathan N. Design of a Moore finite state machine using a novel reversible logic gate, decoder and synchronous up-counter. Proceedings of 11th IEEE Conference on Nanotechnology (IEEE-NANO); 2011. p. 1445–49.
- Mahapatro M, Panda SK, Satpathy J, Saheel M, Suresh M, Panda AK, Sukla MK. Design of arithmetic circuits using reversible logic gates and power dissipation calculation. International Symposium on Electronic System Design (ISED). 2010. p. 85–90.
- Toffoli T. Reversible Computing. Cambridge, MA: MIT Lab. For Comp. Sci., MIT; 1980. Report No.: MIT/LCS/TM-,1980.
- Feynman R. Quantum mechanical computers. Optics News; 1985. p. 11–20.
- Thapliyal H, Ranganathan N. Design of reversible sequential circuits optimizing quantum costs, delay, and garbage outputs, ACM J. Emerg. Technol. Comput. Syst. 2010; 6(4): 14.1–14.31.
- Hari SKS, Shroff S, Mahammad SK, Kamakoti V. Efficient building blocks for reversible sequential circuit design. 49th IEEE International Midwest Symposium on Circuits and Systems; 2006. p. 437–41.
- Fredkin E, Toffoli T. Conservative logic. Int. J. Theor Phys. 1982. p. 219–253.
- ChuangM-L, Wang, C-Y. Synthesis of reversible sequential elements. ACM J. Emerg. Technol. Comput. Syst. 2008; 3(4): 14.1–14.19.
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